1. Purpose

Data compression of 3x3 images using Variational Autoencoder

2. Design enviroment

Synopsys® Synplify Pro® /Premier

Synopsys® Design Compiler®

Mathworks® MATLAB® /Simulink®

Xilinx Vivado® Design Suite

These environments will be listed in our response to the design environment.

Other logic synthesis tool

RTL hand coding( VHDL or Verilog-HDL)