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Design Specification
1. Overview2. Purpose
3. Design environment
4. Overview of the CNN
5. Challenge
30th LSI Design Contest in Hokkaido Design Specification
1. Overview
In the 30th contest, participants will carry out the design through to hardware implementation, using hardware such as ZERO7 from Gigafirm.
Logic synthesis and implementation must target the chip mounted on ZERO7 (AMD Spartan-7 XC7S25CSGA225-1).
About ZERO7
ZERO7 is a Raspberry Pi HAT board that is stacked on the 40-pin GPIO header of a Raspberry Pi.
As shown in the architecture diagram in Figure 1, the GPIO pins of the Raspberry Pi are connected to the FPGA.
Figure 1. Architecture of ZERO7
Figure 2. Photo of ZERO7
By combining a Raspberry Pi with ZERO7, you can use the interfaces of the Raspberry Pi (camera input and monitor output), and by developing LSI circuits on ZERO7, you can easily build a hardware accelerator.
ZERO7 Documents (PDF)
Task
Details of the task will be updated at a later date. For the image size and other details, please see Section 4.
Validation images for the contest will be provided on the day. Your system reads the images from a camera, an SD card, etc. and recognizes them. In your presentation, show how fast the recognition results are output.
3. Design environment
Synopsys® Synplify Pro® /Premier
Synopsys® Design Compiler®
Mathworks® MATLAB® /Simulink®
AMD Vivado® Design Suite (recommended version: 2025.2)
Target device: XC7S25CSGA225-1 (specify this as the part in Vivado)
Other logic synthesis tools
RTL hand coding (VHDL or Verilog-HDL)
Other design environments may also be used depending on your setup.
4. Overview of the CNN
Input image size
Design your CNN to accept 32×32 input images.
* You may use any dataset for training. However, the recognition targets (the classes to classify) will be specified by the organizers.
* The recognition targets will be announced in a future update. Please wait for the next update.
CNN structure
For the CNN structure, please refer to the design overview of the 23rd contest. The structure of the hidden layers and other details is up to you.
5. Challenge
This time, we return to the CNN (Convolutional Neural Network), the foundation of AI, and teams compete on the image recognition accuracy and processing speed of the hardware they design. With the cooperation of our sponsors, Gigafirm Co., Ltd. and Radrix Co., Ltd., we will lend Spartan-7 FPGA boards that can be connected to a Raspberry Pi 5. By using the Raspberry Pi as the I/O device for image input and output, no device driver development is required, so students can focus on architecture and hardware design.
The challenge is divided into the following two classes.
Class 1: Image Classification Class
The task is limited to image classification. In Level 1 and Level 2, logic synthesis and implementation must target the chip mounted on ZERO7 (XC7S25CSGA225-1). Only in Level 3 (Unlimited) may you use any board, in addition to the synthesis report for XC7S25CSGA225-1.
1. Level 1: Beginner
Create a simple CNN (e.g., with a 3×3 input image), and synthesize and implement it targeting XC7S25CSGA225-1.
2. Level 2: Intermediate
Create a CNN for 32×32 input images, perform training and validation, and synthesize and implement it targeting XC7S25CSGA225-1.
3. Level 3: Advanced
Unlimited...
First, design an image classifier in a configuration that fits on XC7S25CSGA225-1 and present its synthesis report. In addition, as long as it is image classification, any board and any architecture — anything is OK, so please send us your various ideas.
Class 2: ZERO7 Class
The board is limited to ZERO7. However, the task is free (not limited to image classification). This class has Level 3 only.
Level 3: Advanced
Unlimited...
As long as you use ZERO7, anything is OK — not limited to image classification.
* Mandatory for all classes: synthesize your design so that it fits in the AMD Spartan-7 XC7S25CSGA225-1 (the chip on ZERO7), and submit the synthesis results (report). Even if you use another board in Unlimited, the synthesis report for XC7S25CSGA225-1 is required.
* For ZERO7 board lending and availability, please contact (Mail title: Zero7 board Univ. name Your name):
Vietnam : Associate Prof. Lâm Đức, Khải, Univ. of Information Tech. (khaild@uit.edu.vn)
Indonesia : Prof. Trio Adiono, ITB (tadiono@itb.ac.id)
Other countries : support@LSI-contest.com