3．Design chip

3.1 Power and modulo

Since Eq.(1) and (2) are same manner, an encryption circuit also can be used as a decryption one. Therefore we can design an encryption circuit only so that it seems easy to design our target. This is not true because both power and modulo operations are not synthesizable in terms of logic design.

Look at Eq.(1) once again. results in nearly 200 digits since we chose E=101 in the example in Sec.2.3. Even one character requires such a heavy large circuit. This is an almost unrealizable circuit so that some modification is required to calculate the power. In addition, mod calculation also requires heavy computational load.
Those power and mod calculation circuits are to be modified in order to meet clock requirement or the number of gates. See reference [2].

3.2 Interface specification
-1 Block wise processing

  A plain text is divided into block wise text consisting of several characters since it becomes heavy file size when a whole plain text is processed at once.
  Suppose the block size, the number of characters in one block, is B. Encipher processes one character by one character so that one block requires B clock time.

-2 Interface