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23rd LSI Design Contests・in Okinawa Design Specification - 4
4.Challenge
- Outline of hardware design
- Verilog-HDL file for simulation
- Continuation for outline of hardware design
input data:3×3 filter : 3 pieces of 2×2 Pooling layer : Max Pooling Activation function : sigmoid function Fully connected layer Create CNN program
- Outline of hardware design
- Verilog-HDL file for simulation
- Continuation for outline of hardware design
input data:28×28 filter : 3 pieces of 5×5 Pooling layer : Max Pooling Activation function : sigmoid function pr ReLU function Fully connected layer Create CNN program
- Outline of hardware design
- Verilog-HDL file for simulation
- Continuation for outline of hardware design
- Explanation for experts level
Un limited.....
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