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Introduction
Welcome to Design Contest
This year's design task is the BCH (Bose, Chaudri, Hocquenguem) Digital Error Correction Circuit, which is based on Grois Field Mathematics. Since this contest is mainly for University students, the code size in the task is relatively small to let student to design easily. In addition, some task level is prepared for several students levels.
The requirements of the design is to write HDL (VHDL or Verilog HDL) and to synthesize digital circuits using Synopsys design analyzer or any other EDA tools. Making FPGA is also optional but our judges love to see your FPGA designs.
Figure 1: Encoding and decoding system diagram
Figure 1 shows the encoding and decoding system diagram. There are two big blocks such as BCH encoder and BCH decoder. This year’s design task is the DECODER. In order to send ASCII data, the information width is 7 bits. By adding 8 bit parity bits, the code length is 15 bits. Then, we call BCH(15,7) system. The BCH(15,7) can correct 2 bit errors in 15 bits code.
DECODER receives 15 bit packet with error bits included and performs Error Correction operation. Since BCH is much simpler than Reed-Solomon (RS) code, it is very good for students’ design contest task. Actually, the BCH decoder can be realized by Grois field remainder circuit and Table circuit.
Guidelines for applicants
- Design Specification
- Who can join : the team of 1-3 University or college students.
- A necessary matter is described, and Mail Sending in the following acceptance addresses.
- How to submit report (Important information)
- The final report deadline :2010/Jan/29th
EMAIL : support@LSI-contest.com
Suggestion from judges
- We try to evaluate not only the speed and the area, but also your idea ,originality, uniqueness. But be sure to remember that we are not perfect, please make a good presentation to appeal us.
- We definitely take your school grade into account.
- We like fun ideas. Please do something different from others.
Access
- Name: Okinawa Convention Center A1hall
- Date : 19/Fri./March (1:00pm - 5:00pm)
- Place:
4-3-1
Mashiki Ginowan-shi Okinawa-ken
901-2224
Japan
URL : http://www.oki-conven.jp/modules/tinyd3/content/index.php?id=6
Kyushu Institute of Technology, Japan
E-mail:ochi@cse.kyutech.ac.jp Tel: +81-0948-29-7692
University of the Ryukyus, Japan
Sponsor:Xilinx,Inc. Radrix co.Ltd. Tokyo Electron Device LTD.
Cybernet Systems Co., Ltd.Nihon Synopsys G.K. ROHM Co.,Ltd.
Renesas Technology Corp.