| Japanese | English |
Design Specification
1. Noise Cancelling Algorithm[1]1-1. Specter Subtraction Method (SS Method)
2. Implementation of the Noise Cancelling System
2-1.Separating into the Hardware and the Software
2-1-1.Features of the HW and the SW
2-1-2. Feature of Noise Cancelling System
2-1-3. Architecture
2-2. Hardware
2-2-1. Processing flow
2-2-2. Circuit structure
2-2-3. HW timing
2-3. Software
2-3-1. Source code
2-3-2. Flow chart
3. Development Environment
3-1. Hardware Design Process
3-1-1. Design Hardware Logic
3-1-2. Manual of Xilinx ISE and EDK
3-2. Software design process
4. Contest Design Target
5. SPEED and AREA
6. References
7. Download
16th LSI Design ContestsEin Okinawa Design Specification - 5
5.SPEED and AREA
Although it is getting very difficult to compare many designs, please use the following design parameter normalization. The UNIT AREA is defined as 50 inputs EXOR circuit.The UNIT SPEED is the latency of 50 inputs EXOR circuit. Please show your designfs area and speed by this normalized UNITS.
50 inputs exor VHDLFparity.vhd
Copyright (C) 2012 Radrix. All Rights Reserved.